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Tim Molteno and Roy Ward, Department of Physics


Massively Parallel MIMD Processing in Hardware


Archway 2 - 1:00 pm, Friday 3 August


The electronics research group at Otago University has been developing specialised hardware for solving Physics problems for the last few years. We have developed a very small footprint, high-speed reconfigurable CPU that is designed for incorporation into programmable hardware (FPGA's). We have also developed assemblers and are in the process of developing compilers. This TTA ({\em Transport Triggered Architecture}) CPU can be coupled to application specific functional units that carry out computationally intensive parts of the problem. We have investigated the application of this approach to two sample problems; that of gravitational $N$-body simulations, and ray-triangle intersections.

Last modified: Thursday, 28-Jul-2005 17:23:30 NZST

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